IBM dual-processor quantum system 2027, Digi Mart USA News: IBM is using its Quantum Developer’s Conference this week to update its roadmap, stating that it aims to build error-corrected quantum computers before the decade is out. The company plans to link two 520-qubit chips before next year is over.
The changes significantly expand the scope of IBM’s next-generation Nighthawk general-use processors by adding a version with more than 500 programmable qubits. At the same time, the company is scaling back its plan to link multiple Nighthawk processors together, reducing the intended number of linked systems from nine to two.
The total number of qubits planned for next year will remain the same, but the path to reaching it has changed.
IBM is also highlighting a major change introduced in the generation of Nighthawk processors released in September: hardware-based qubit resets. The company’s roadmap has two parallel tracks.
One focuses on technical development of technologies needed for error-corrected hardware, which may not be useful outside that context. The other is public-facing and focused on delivering high-performance processors for users testing algorithms on quantum systems today.
The split reflects IBM’s plan to use an error-correction code that requires a specific number of hardware qubits in a specific geometry, plus additional qubits to perform operations on that code. Algorithms could run directly on this hardware without error correction, but the results would not necessarily be optimal, so IBM is also offering the more general-purpose Nighthawk processor in parallel.
Throughout 2028, the public-facing track will see only revisions to the current Nighthawk generation, which started with 120 hardware qubits and was expected to perform about 5,000 gate operations before errors become too likely to rely on its output. The previous roadmap called for 2027’s version to reach 10,000 gate operations while keeping 120 hardware qubits, with qubit counts raised by chaining multiple chips together.
The earlier roadmap also called for linking three Nighthawk processors in 2026 to create a 360-qubit machine.
That is not happening this year. Instead, Nighthawk r2, released in September, is being offered as a single chip.
IBM says it provides a major performance boost over r1, mainly because the company has dedicated substantial hardware to resetting qubits to the ground state. The company says the chip contains 458 physical qubits, of which only 120 are programmable.
Oliver Dial, a VP of Quantum Systems at IBM, said the extra physical qubit included for each programmable qubit “lets us quickly remove the energy from one of our programmable qubits, returning it to the ground state,” adding that the capability “lets our users run circuits on this chip faster than was ever before possible.” IBM reports up to a 19-fold acceleration of some operations, though the reset step is not necessary for every operation.
The devices used for resets are physically identical to programmable qubits but cannot be used as qubits; IBM sometimes calls them “dissipative reset gadgets.”
The plan for Nighthawk r3 in 2027 is to retain this reset technology and combine it with other hardware improvements to further increase the number of operations that can be performed before errors become too likely. It targets 520 programmable qubits.
Assuming the same ratio of programmable qubits to reset devices, the chip would contain roughly 2,000 individual qubit-like devices, about double the size of the largest quantum processor IBM has offered to date.
The larger size keeps IBM roughly on its roadmap. The existing plan promised users access to a single 1080-qubit system built by linking nine 120-qubit Nighthawk chips.
The company now plans to offer a 1040-qubit machine, close to 1080, by linking just two chips. This could suggest IBM is having difficulty with chip-to-chip communication, but executives indicated otherwise.
Dial said IBM has shown “four L-couplers joining two Nighthawk R1 processors in the same refrigerator, reaching state transfer fidelities of up to 99.4 percent, very close to our long-term target of 99.9 percent.” Jerry Chow, IBM’s CTO of Quantum-Centric Supercomputing, said these connections are comparable in speed to qubit interconnections on the chip itself.
Dial acknowledged that the company is still determining how many couplers will be needed to link chips hosting error-corrected qubits, though this should not affect the user-facing portion of the roadmap. IBM has also demonstrated a modular dilution refrigerator designed to bring multiple chips and their connectors down to near-absolute-zero temperatures.
IBM’s long-term plan is to use roughly 300 hardware qubits to host a block of 12 logical, error-corrected qubits, which likely means one or possibly two blocks per chip. Reaching 100 or more logical qubits, the point at which some useful algorithms can run, would require a larger chip than Nighthawk r2 and linking five or more such chips together.
With the roadmap changes, IBM will need to accomplish both by the end of next year to stay on track.
